EPM3064ATI44-10 vs EPM3064ATC44-10N Comparison

Detailed side-by-side comparison of EPM3064ATI44-10 by Intel and EPM3064ATC44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3064ATC44-10N

EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N βœ“ Active

Specification Comparison

Parameter EPM3064ATI44-10 EPM3064ATC44-10N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Active
Stock Status In Stock In Stock
Unit Price (USD) $7.65 $5.10
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) β€”
Programmable Type In-System Programmable (ISP), EEPROM-based β€”
Number of Macrocells 64 β€”
Number of Logic Array Blocks (LABs) 4 β€”
Number of Usable Gates 1,250 β€”
Number of User I/O Pins 34 β€”
Package TQFP-44 (10x10 mm, 0.8 mm pitch) TQFP-44 (10x10 mm)
Pin-to-Pin Delay (tPD) 10 ns 10 ns
Maximum Counter Frequency 227.3 MHz 192.3 MHz
Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Voltage Tolerance 5.0 V tolerant (MultiVolt I/O) β€”
JTAG Interface IEEE Std. 1149.1 compliant β€”
ISP Standard IEEE Std. 1532 β€”
Operating Temperature -40C to +85C (Industrial) 0C to +70C (commercial)
RoHS Status Non-Compliant (contains lead, per DigiChip listing) Compliant
Lead Free Status Contains Lead β€”
Mounting Type Surface Mount Surface Mount
Process Technology CMOS, EEPROM β€”
Programming Cycles [DATA_NEEDED: typical program/erase endurance] β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Usable Gates β€” 1250
Macro Cells β€” 64
User I/O Pins β€” 34
Logic Array Blocks (LABs) β€” 4
I/O Standard β€” MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V)
Configuration Memory β€” EEPROM (non-volatile)
In-System Programming β€” IEEE Std. 1532 compliant
Boundary-Scan Test β€” IEEE Std. 1149.1 (JTAG) compliant
Pin-Locking β€” Yes (across design iterations)

Datasheets & Resources

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