EPM3064ATI44-10NAD vs EPM3064ATI44-10N Comparison

Detailed side-by-side comparison of EPM3064ATI44-10NAD by Altera and EPM3064ATI44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATI44-10NAD EPM3064ATI44-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $4.10 $3.95
Family MAX 3000A MAX 3000A
Macrocells 64 64
Usable Gates 1,250 1250
Logic Array Blocks (LABs) 4 (16 macrocells each) β€”
User I/Os (max) 34 β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Setup Time (tSU) 4.5 ns β€”
Core Voltage (VCCINT) 3.3 V β€”
I/O Voltage (VCCIO) 3.3 V or 2.5 V β€”
Package TQFP-44 44-pin TQFP
Operating Temperature -40C to +85C (Industrial) -40C to +85C (Industrial, "N" suffix)
Programming Interface JTAG (IEEE Std. 1532 compliant) β€”
In-System Programmable Yes β€”
RoHS Status Compliant Non-Compliant (per digchip datasheet excerpt)
Mounting Type Surface Mount Surface Mount
Product Type β€” CPLD (Complex Programmable Logic Device)
User I/Os β€” 34
Dedicated Inputs β€” 4
Logic Blocks β€” 4
Pin-to-Pin Delay β€” 10 ns (-10 speed grade)
Maximum Frequency (fMAX) β€” 100 MHz
Programmable Type β€” In-System Programmable (EEPROM)
ISP Interface β€” IEEE Std. 1149.1 (JTAG)
ISP Standard Compliance β€” IEEE Std. 1532
Core Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 3.3 V or 2.5 V (MultiVolt)
Process Technology β€” CMOS EEPROM
Boundary-Scan Test β€” Built-in (JTAG)
Lead-Free Status β€” Contains Lead (per digchip datasheet excerpt)

Datasheets & Resources

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