EPM3064ATI44-7 vs EPM3064ATI44-4N Comparison

Detailed side-by-side comparison of EPM3064ATI44-7 by Altera and EPM3064ATI44-4N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATI44-7 EPM3064ATI44-4N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $4.40 $4.25
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 64 β€”
Usable Gates 1,250 1,250 gates
User I/O 34 β€”
Logic Array Blocks (LABs) 4 (16 macrocells each) β€”
Propagation Delay (tPD) 7.5 ns β€”
Maximum Internal Frequency (fMAX) 135.1 MHz β€”
Supply Voltage (VCCINT) 3.0 V to 3.6 V β€”
Supply Voltage (VCCIO) 3.0 V to 3.6 V β€”
Process Technology 0.30 Β΅m CMOS EEPROM β€”
Operating Temperature -40 Β°C to +85 Β°C (Industrial, 'I' suffix) -40C to +85C (industrial)
Package 44-pin TQFP (TI44) 44-pin TQFP
Mounting Type Surface Mount Surface Mount
In-System Programmability Yes, IEEE Std. 1532 compliant β€”
JTAG Support Yes (IEEE 1149.1) β€”
PCI Compliance Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2 β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
MSL Level [DATA_NEEDED: MSL level] β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Logic Elements / Macrocells β€” 64 macrocells
Number of Logic Array Blocks (LABs) β€” 4 LABs (16 macrocells each)
Maximum Operating Frequency β€” 222.2 MHz
Pin-to-Pin Propagation Delay (tPD) β€” 4.5 ns (-4 speed grade)
Supply Voltage - Core (VCCINT) β€” 3.3 V
Supply Voltage - I/O (VCCIO) β€” 3.3 V or 2.5 V
User I/O Pins β€” 34 I/O
Programming Interface β€” IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP
Configuration Memory β€” EEPROM (non-volatile)

Datasheets & Resources

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