EPM3128ATC100-5 vs EPM3128ATI100-5N Comparison

Detailed side-by-side comparison of EPM3128ATC100-5 by Intel and EPM3128ATI100-5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3128ATC100-5 EPM3128ATI100-5N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $15.43 $11.45
Series MAX 3000A β€”
Family CPLD - MAX 3000A MAX 3000A
Macrocells 128 128
Usable Gates 2,500 β€”
User I/Os 80 β€”
Dedicated Inputs 4 β€”
Pin-to-Pin Delay (tpd) 5 ns (commercial); 7.5 ns β€”
Maximum Frequency (fCNT) 192.3 MHz β€”
Supply Voltage (VCCINT/VCCIO) 3.3 V β€”
Output Drive Voltage 2.5 V or 3.3 V (programmable) β€”
Input Tolerance 2.5 V, 3.3 V, 5.0 V tolerant β€”
Program Memory Type EEPROM β€”
In-System Programmability Yes, IEEE Std. 1532 compliant β€”
JTAG Boundary Scan Yes, IEEE Std. 1149.1 β€”
Operating Temperature 0 Β°C to 70 Β°C (Commercial) -40C to +85C (Industrial)
Package 100-pin TQFP (Fine Line) 100-pin TQFP
Mounting Type Surface Mount Surface Mount
Logic Family CMOS β€”
RoHS Status [DATA_NEEDED: RoHS status] Compliant (lead-free TQFP package)
Process Technology CMOS EEPROM β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) β€” 8 (16 macrocells per LAB)
User I/O Pins β€” 80
Pin-to-Pin Delay (tPD) β€” 5.0 ns
Supply Voltage (VCCINT) β€” 3.3 V
I/O Standard β€” 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs
Programming Method β€” In-System Programmable via IEEE Std. 1532 (JTAG)
Configuration Memory β€” Non-volatile EEPROM
JTAG Support β€” IEEE 1149.1 boundary scan

Datasheets & Resources

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