EPM3128ATC144-10N vs EPM3128ATC144-5N Comparison
Detailed side-by-side comparison of EPM3128ATC144-10N by Intel and EPM3128ATC144-5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3128ATC144-10N | EPM3128ATC144-5N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6.56 | $13.75 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 128 | β |
| Usable Gates | 2,500 (up to 10,000 for full family) | 2500 |
| Logic Array Blocks (LABs) | 8 | β |
| User I/Os | 96 | β |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | β |
| Counter Frequency (fCNT) | 98 MHz | β |
| Supply Voltage (VCCINT/VCCIO) | 3.3 V | β |
| MultiVolt I/O Support | 3.3 V / 2.5 V / 1.8 V | β |
| Configuration Memory | EEPROM (in-system programmable, non-volatile) | β |
| Package | 144-pin TQFP | 144-pin TQFP (20x20 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial) | 0C to 70C (Commercial) |
| JTAG (IEEE 1149.1) | Yes (BST + pin-locking) | β |
| ISP (IEEE 1532) | Yes | β |
| Logic Family | β | CMOS |
| Macrocells | β | 128 |
| User I/O | β | 96 |
| Pin-to-Pin Logic Delay | β | 5 ns |
| Counter Frequency | β | up to 227.3 MHz |
| Supply Voltage (Core) | β | 3.3 V |
| I/O Logic Levels Supported | β | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| In-System Programmability | β | Yes (3.3-V via JTAG) |
| JTAG Boundary Scan | β | IEEE Std 1149.1 compliant |
| RoHS Status | β | Compliant (lead-free) |