EPM3128ATC144-5 vs EPM3128ATC100-5 Comparison

Detailed side-by-side comparison of EPM3128ATC144-5 by Altera and EPM3128ATC100-5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3128ATC144-5 EPM3128ATC100-5
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $4.85 $15.43
Family MAX 3000A CPLD - MAX 3000A
Logic Family CMOS CMOS
Device Type CPLD (Complex Programmable Logic Device) β€”
Number of Macrocells 128 β€”
Number of Logic Array Blocks (LABs) 8 β€”
Number of User I/Os 96 β€”
Device System Gates 2500 β€”
Product Terms per Macrocell 32 β€”
Propagation Delay (tPD) 7.5 ns β€”
Maximum Internal Frequency 192.3 MHz β€”
Number of Global Clocks 2 β€”
Program Memory Type EEPROM (non-volatile) EEPROM
Supply Voltage (Core) 3.3 V β€”
Multi-Volt I/O Voltage 2.5 V / 3.3 V / 5.0 V tolerant β€”
In-System Programmability Yes (IEEE Std. 1532 compliant) Yes, IEEE Std. 1532 compliant
JTAG / IEEE 1149.1 Yes (boundary-scan + ISP) β€”
Operating Temperature 0C to +70C (Commercial) 0 Β°C to 70 Β°C (Commercial)
Package TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm) 100-pin TQFP (Fine Line)
Process Technology 0.30 um CMOS EEPROM, 4 metal layers CMOS EEPROM
RoHS Status Not Compliant (per Arrow distributor listing) [DATA_NEEDED: RoHS status]
ECCN EAR99 β€”
HTS Code 8542.31.00.55 β€”
Series β€” MAX 3000A
Macrocells β€” 128
Usable Gates β€” 2,500
User I/Os β€” 80
Dedicated Inputs β€” 4
Pin-to-Pin Delay (tpd) β€” 5 ns (commercial); 7.5 ns
Maximum Frequency (fCNT) β€” 192.3 MHz
Supply Voltage (VCCINT/VCCIO) β€” 3.3 V
Output Drive Voltage β€” 2.5 V or 3.3 V (programmable)
Input Tolerance β€” 2.5 V, 3.3 V, 5.0 V tolerant
JTAG Boundary Scan β€” Yes, IEEE Std. 1149.1
Mounting Type β€” Surface Mount

Datasheets & Resources

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