EPM3128ATC144-7N vs EPM3128ATC144-10 Comparison
Detailed side-by-side comparison of EPM3128ATC144-7N by Altera and EPM3128ATC144-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128ATC144-7N - MAX 3000A CPLD, 128 Macrocells, 7.5ns | Altera
EPM3128ATC144-7N β Active
Specification Comparison
| Parameter | EPM3128ATC144-7N | EPM3128ATC144-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.25 | $6.20 |
| Series | MAX 3000A | β |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | EEPROM-based, MAX architecture | β |
| Number of Macrocells | 128 | β |
| Number of Usable Gates | Up to 10,000 | β |
| User I/Os | 96 | 96 |
| Pin Count | 144 | β |
| Package | TQFP-144 (20 x 20 mm, 0.5 mm pitch) | 144-pin TQFP (TQ144) |
| Logic Family | CMOS | β |
| Propagation Delay (tPD) | 7.5 ns (pin-to-pin, -7 speed grade) | 10 ns (speed grade -10) |
| Counter Frequency | Up to 227.3 MHz | β |
| Core Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | β |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial) | 0C to +70C (commercial) |
| In-System Programmability (ISP) | Yes, via JTAG (IEEE 1149.1) | β |
| PCI Compliance | Compatible with PCI Local Bus Specification Rev. 2.2 | β |
| Mounting Type | Surface Mount (SMD/SMT) | Surface Mount |
| RoHS Status | Lead-free (-7N suffix indicates Pb-free finish) | Compliant |
| Family | β | MAX 3000A |
| Macro Cells | β | 128 |
| Usable Gates | β | 2,500 (typical) |
| Logic Elements / LABs | β | 4 Logic Array Blocks |
| Counter Frequency (fCNT) | β | Up to 227.3 MHz |
| Supply Voltage (VCCINT) | β | 3.3 V |
| MultiVolt I/O Interface | β | 1.5V / 1.8V / 2.5V / 3.3V |
| In-System Programmability | β | IEEE Std. 1532 compliant |
| Boundary-Scan Test | β | IEEE Std. 1149.1 (JTAG) |
| Configuration Memory | β | EEPROM (non-volatile, instant-on) |
| Lead-Free | β | Yes |