EPM3128ATI144-10 vs EPM3128ATI144-7N Comparison
Detailed side-by-side comparison of EPM3128ATI144-10 by Altera and EPM3128ATI144-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128ATI144-10
EPM3128ATI144-10 - MAX 3000A CPLD 128 Macro 98 I/O TQFP-144 | Intel/Altera
EPM3128ATI144-10 NrndAltera
EPM3128ATI144-7N
EPM3128ATI144-7N - 128 Macrocell CPLD, 129.9MHz, 3.3V | Altera MAX 3000A
EPM3128ATI144-7N β Last Time BuySpecification Comparison
| Parameter | EPM3128ATI144-10 | EPM3128ATI144-7N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.85 | $9.95 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 2,500 | β |
| Macro Cells | 128 | β |
| Logic Array Blocks (LABs) | 8 | β |
| User I/Os | 98 | β |
| Pin Count | 144 | β |
| Package | TQFP-144 (FINE LINE) | 144-pin TQFP |
| Supply Voltage (VCCINT) | 3.3 V | β |
| Pin-to-Pin Delay | 10 ns (speed grade -10) | β |
| Counter Frequency | 98 MHz typical | β |
| Logic Family | CMOS, EEPROM-based | β |
| Programming Interface | IEEE 1149.1 JTAG (ISP) | JTAG (IEEE Std 1149.1) in-system programmable |
| PCI Compliance | PCI Local Bus Spec Rev 2.2 (speed grades -4 to -10) | β |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Mounting Type | Surface Mount (Gull-Wing TQFP) | β |
| RoHS Status | Compliant (lead-free TQFP) | β |
| Logic Capacity | β | 2.5K gates |
| Macrocells | β | 128 |
| Maximum Frequency (fMAX) | β | 129.9 MHz |
| Pin-to-Pin Propagation Delay | β | 7.5 ns (speed grade -7) |
| User I/O Pins | β | 96 |
| Core Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Supply Voltage (VCCIO) | β | 3.3 V / 2.5 V / 1.8 V |
| Programmable Logic Technology | β | CMOS EEPROM |
| Terminal Pitch | β | 0.5 mm |
| JEDEC Package Code | β | S-PQFP-G144 |
| MultiVolt I/O | β | Yes (interfaces with 5.0V/3.3V/2.5V/1.8V logic) |