EPM3128ATI144-10N vs EPM3256ATI144-10 Comparison
Detailed side-by-side comparison of EPM3128ATI144-10N by Intel and EPM3256ATI144-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3128ATI144-10N
EPM3128ATI144-10N - 128-Macrocell MAX 3000A CPLD, 10ns | Intel / Altera
EPM3128ATI144-10N NrndIntel
EPM3256ATI144-10
EPM3256ATI144-10 - MAX 3000A 256-Macrocell 10ns CPLD | Intel
EPM3256ATI144-10 ObsoleteSpecification Comparison
| Parameter | EPM3128ATI144-10N | EPM3256ATI144-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.32 | $0.00 |
| Family | MAX 3000A | β |
| Logic Type | CMOS EEPROM-based CPLD | β |
| Macrocells | 128 | β |
| Typical Gates | 2.5K | β |
| User I/Os | 96 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Internal Frequency | 98 MHz | β |
| Supply Voltage (VCCINT) | 3.3 V | 3.0 V to 3.6 V (3.3 V nominal) |
| Output Bank Voltage (VCCIO) | 3.3 V or 2.5 V | β |
| Package | 144-pin TQFP | 144-pin TQFP (20x20 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | Industrial -40C to +85C | -40Β°C to +85Β°C (industrial) |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | β |
| JTAG / Boundary Scan | Yes (IEEE 1149.1) | β |
| Configuration Memory | Non-volatile EEPROM | β |
| RoHS Status | Compliant | β |
| Series | β | MAX 3000A |
| Programmable Type | β | In-System Programmable (ISP), EEPROM-based |
| Number of Macrocells | β | 256 |
| Number of Logic Elements / Blocks | β | 16 LABs (Logic Array Blocks) |
| Number of Gates | β | 5,000 typical usable gates |
| Number of User I/O | β | 116 |
| Propagation Delay (tpd max) | β | 10 ns |
| Maximum Frequency (fmax) | β | 95.2 MHz |
| I/O Voltage Support | β | MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V mixed |
| Logic Family | β | CMOS, EEPROM-based |
| Programming Interface | β | JTAG (IEEE 1149.1) and IEEE Std. 1532 ISP |
| Compliance | β | IEEE Std. 1532 ISP, PCI-compatible I/O |
| Lifecycle Status | β | Obsolete (per HighqualityPCB listing) |