EPM3128ATI144-7N vs EPM3128ATC144-5N Comparison
Detailed side-by-side comparison of EPM3128ATI144-7N by Altera and EPM3128ATC144-5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128ATI144-7N - 128 Macrocell CPLD, 129.9MHz, 3.3V | Altera MAX 3000A
EPM3128ATI144-7N β Last Time BuySpecification Comparison
| Parameter | EPM3128ATI144-7N | EPM3128ATC144-5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $13.75 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Logic Capacity | 2.5K gates | β |
| Macrocells | 128 | 128 |
| Maximum Frequency (fMAX) | 129.9 MHz | β |
| Pin-to-Pin Propagation Delay | 7.5 ns (speed grade -7) | β |
| User I/O Pins | 96 | β |
| Core Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V / 2.5 V / 1.8 V | β |
| Programmable Logic Technology | CMOS EEPROM | β |
| Programming Interface | JTAG (IEEE Std 1149.1) in-system programmable | β |
| Package | 144-pin TQFP | 144-pin TQFP (20x20 mm) |
| Terminal Pitch | 0.5 mm | β |
| JEDEC Package Code | S-PQFP-G144 | β |
| Operating Temperature | -40C to +85C (industrial) | 0C to 70C (Commercial) |
| MultiVolt I/O | Yes (interfaces with 5.0V/3.3V/2.5V/1.8V logic) | β |
| Logic Family | β | CMOS |
| Usable Gates | β | 2500 |
| User I/O | β | 96 |
| Pin-to-Pin Logic Delay | β | 5 ns |
| Counter Frequency | β | up to 227.3 MHz |
| Supply Voltage (Core) | β | 3.3 V |
| I/O Logic Levels Supported | β | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| In-System Programmability | β | Yes (3.3-V via JTAG) |
| JTAG Boundary Scan | β | IEEE Std 1149.1 compliant |
| RoHS Status | β | Compliant (lead-free) |
| Mounting Type | β | Surface Mount |