EPM3256AFC256-10 vs EPM3512AFC256-18 Comparison

Detailed side-by-side comparison of EPM3256AFC256-10 by Altera and EPM3512AFC256-18 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3256AFC256-10 EPM3512AFC256-18
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $19.95 $17.20
Family MAX 3000A MAX 3000A
Logic Family CMOS (EEPROM-based) β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 256 β€”
Usable Gates 5,000 β€”
Logic Array Blocks (LABs) 16 (16 macrocells each) 16
Maximum User I/Os 161 β€”
Propagation Delay (tPD) 10 ns β€”
Internal Counter Frequency (fCNT) 95.2 MHz β€”
Supply Voltage (VCCINT) 3.3 V β€”
I/O Voltage Tolerance 5.0 V tolerant β€”
In-System Programmability Yes (3.3 V ISP via JTAG IEEE 1149.1) β€”
Operating Temperature 0Β°C to +70Β°C (Commercial) [DATA_NEEDED: industrial/commercial grade]
Package 256-ball FBGA (Fine-Line BGA) 256-ball FineLine BGA (FCBGA)
Pitch [DATA_NEEDED: BGA ball pitch] β€”
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: not specified in retrieved data]
Macrocells β€” 512
Maximum User I/O Pins β€” 212
Pin-to-Pin Delay (tPD1) β€” 18 ns
Global Clock Networks β€” 4
VCCINT (Core Supply) β€” 3.0 V to 3.6 V (3.3 V typical)
VCCIO (I/O Supply) β€” 2.5 V or 3.3 V (MultiVolt)
Programming Technology β€” EEPROM (non-volatile)
In-System Programming β€” IEEE Std. 1532 / JTAG (IEEE Std. 1149.1)
Ball Pitch β€” 1.0 mm

Datasheets & Resources

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