EPM3256AFC256-10 vs EPM3512AFC256-22 Comparison

Detailed side-by-side comparison of EPM3256AFC256-10 by Altera and EPM3512AFC256-22 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3256AFC256-10 EPM3512AFC256-22
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $19.95 $16.10
Family MAX 3000A MAX 3000A
Logic Family CMOS (EEPROM-based) β€”
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 256 β€”
Usable Gates 5,000 β€”
Logic Array Blocks (LABs) 16 (16 macrocells each) 16
Maximum User I/Os 161 β€”
Propagation Delay (tPD) 10 ns 22 ns
Internal Counter Frequency (fCNT) 95.2 MHz β€”
Supply Voltage (VCCINT) 3.3 V β€”
I/O Voltage Tolerance 5.0 V tolerant β€”
In-System Programmability Yes (3.3 V ISP via JTAG IEEE 1149.1) β€”
Operating Temperature 0Β°C to +70Β°C (Commercial) [DATA_NEEDED: operating temperature grade]
Package 256-ball FBGA (Fine-Line BGA) FC-256 (FineLine BGA, 256 balls, 1.0 mm pitch)
Pitch [DATA_NEEDED: BGA ball pitch] β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Macrocells β€” 512
Maximum User I/O Pins β€” 208 (typical for FC256 package)
Speed Grade β€” -22 (tPD ~22 ns)
Supply Voltage VCCINT β€” 3.3 V
I/O Standards Supported β€” 2.5 V, 3.3 V, 5.0 V (VCCIO selectable)
In-System Programming β€” IEEE Std. 1532-compliant ISP via JTAG
Configuration Memory β€” On-chip EEPROM (non-volatile)

Datasheets & Resources

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