EPM3256AFC256-10 vs EPM3512AFC256-23 Comparison

Detailed side-by-side comparison of EPM3256AFC256-10 by Altera and EPM3512AFC256-23 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3256AFC256-10 EPM3512AFC256-23
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $19.95 $15.75
Family MAX 3000A MAX 3000A
Logic Family CMOS (EEPROM-based) β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 256 β€”
Usable Gates 5,000 10,000
Logic Array Blocks (LABs) 16 (16 macrocells each) 16 (32 macrocells each)
Maximum User I/Os 161 β€”
Propagation Delay (tPD) 10 ns 5.5 ns
Internal Counter Frequency (fCNT) 95.2 MHz β€”
Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Voltage Tolerance 5.0 V tolerant β€”
In-System Programmability Yes (3.3 V ISP via JTAG IEEE 1149.1) β€”
Operating Temperature 0Β°C to +70Β°C (Commercial) [DATA_NEEDED: operating temperature grade]
Package 256-ball FBGA (Fine-Line BGA) 256-ball FineLine BGA (FC256), 17 mm x 17 mm
Pitch [DATA_NEEDED: BGA ball pitch] β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status [DATA_NEEDED: RoHS compliance status] β€”
Macrocells β€” 512
Maximum Operating Frequency β€” 178.6 MHz
Pin-to-Pin Delay β€” 23 ns
I/O Supply Voltage (VCCIO) β€” 2.5 V / 3.3 V / 5.0 V (MultiVolt)
User I/O Pins β€” [DATA_NEEDED: user I/O count for FC256]
Programming Interface β€” JTAG (IEEE Std. 1149.1) / ISP
Process Technology β€” 0.30 Β΅m CMOS EEPROM

Datasheets & Resources

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