EPM3256AQC208-10N vs EPM3256AQC208-10 Comparison
Detailed side-by-side comparison of EPM3256AQC208-10N by Altera and EPM3256AQC208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3256AQC208-10 - MAX 3000A CPLD 256 Macrocells 10ns 208-PQFP | Intel / Altera
EPM3256AQC208-10 ObsoleteSpecification Comparison
| Parameter | EPM3256AQC208-10N | EPM3256AQC208-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.62 | $15.20 |
| Series | MAX 3000A | β |
| Programmable Type | In-System Programmable (EEPROM) | β |
| Number of Macrocells | 256 | β |
| Number of Logic Elements/Blocks | 16 LABs | β |
| Usable Gates | 10,000 | 5,000 |
| Number of I/O Pins | 161 (158 user I/O per Arrow listing) | β |
| Propagation Delay (tpd) | 10 ns (max) | β |
| Maximum Counter Frequency | 227.3 MHz | β |
| Supply Voltage - Internal | 3.0 V to 3.6 V (3.3 V typical) | β |
| Operating Temperature | 0C to +70C (Commercial) | 0 Β°C to +70 Β°C (Commercial) |
| Package / Case | 208-BFQFP / 208-PQFP (28x28 mm) | β |
| Mounting Type | Surface Mount | Surface Mount |
| ISP Compliance | IEEE Std. 1532 | β |
| Boundary Scan | IEEE Std. 1149.1 (JTAG) | β |
| I/O Tolerance | 5 V tolerant, MultiVolt interface | MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant |
| RoHS Status | [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] | [DATA_NEEDED: RoHS status] |
| Family | β | MAX 3000A |
| Logic Family | β | CMOS (EEPROM-based) |
| Macrocells | β | 256 |
| User I/Os | β | 161 |
| Number of Pins | β | 208 |
| Package | β | 208-BFQFP (PQFP, Gull Wing) |
| Pin-to-Pin Propagation Delay | β | 10 ns |
| Counter Frequency (max) | β | 227.3 MHz |
| Supply Voltage (VCCINT) | β | 3.3 V |
| Programming Interface | β | IEEE 1149.1 JTAG (ISP) |
| PCI-SIG Compliance | β | Yes (speed grades -4, -5, -6, -7, -10) |
| Global Clock Networks | β | 4 (CLK, CLR, OE, GCLK) |