EPM3256AQC208-10N vs EPM3512AQ208-10N Comparison

Detailed side-by-side comparison of EPM3256AQC208-10N by Altera and EPM3512AQ208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3256AQC208-10N EPM3512AQ208-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $4.62 $21.40
Series MAX 3000A β€”
Programmable Type In-System Programmable (EEPROM) β€”
Number of Macrocells 256 β€”
Number of Logic Elements/Blocks 16 LABs β€”
Usable Gates 10,000 10,000
Number of I/O Pins 161 (158 user I/O per Arrow listing) β€”
Propagation Delay (tpd) 10 ns (max) β€”
Maximum Counter Frequency 227.3 MHz β€”
Supply Voltage - Internal 3.0 V to 3.6 V (3.3 V typical) β€”
Operating Temperature 0C to +70C (Commercial) β€”
Package / Case 208-BFQFP / 208-PQFP (28x28 mm) β€”
Mounting Type Surface Mount Surface Mount
ISP Compliance IEEE Std. 1532 β€”
Boundary Scan IEEE Std. 1149.1 (JTAG) β€”
I/O Tolerance 5 V tolerant, MultiVolt interface β€”
RoHS Status [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] unknown
Family β€” MAX 3000A
Device Type β€” CPLD (Complex Programmable Logic Device)
Macrocells β€” 512
User I/Os β€” 172
Logic Array Blocks (LABs) β€” 32
Package β€” 208-pin PQFP
Speed Grade β€” -10 (10 ns pin-to-pin delay)
Pin-to-Pin Delay (tPD) β€” 4.5 ns (typical)
Maximum Frequency (fCNT) β€” 227.3 MHz
Core Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 2.5 V, 3.3 V, or 5.0 V
Process Technology β€” CMOS EEPROM
Programming Interface β€” IEEE Std. 1532 (JTAG) ISP
Operating Temperature (Industrial) β€” -40 C to +85 C

Datasheets & Resources

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