EPM3256AQC208-10N vs EPM3512AQC208-10 Comparison

Detailed side-by-side comparison of EPM3256AQC208-10N by Altera and EPM3512AQC208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3256AQC208-10N EPM3512AQC208-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $4.62 $22.10
Series MAX 3000A β€”
Programmable Type In-System Programmable (EEPROM) β€”
Number of Macrocells 256 β€”
Number of Logic Elements/Blocks 16 LABs β€”
Usable Gates 10,000 10,000
Number of I/O Pins 161 (158 user I/O per Arrow listing) β€”
Propagation Delay (tpd) 10 ns (max) β€”
Maximum Counter Frequency 227.3 MHz β€”
Supply Voltage - Internal 3.0 V to 3.6 V (3.3 V typical) β€”
Operating Temperature 0C to +70C (Commercial) 0C to +70 C (commercial)
Package / Case 208-BFQFP / 208-PQFP (28x28 mm) β€”
Mounting Type Surface Mount β€”
ISP Compliance IEEE Std. 1532 β€”
Boundary Scan IEEE Std. 1149.1 (JTAG) β€”
I/O Tolerance 5 V tolerant, MultiVolt interface β€”
RoHS Status [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] [DATA_NEEDED: RoHS status not in verified data]
Family β€” MAX 3000A
Macrocells β€” 512
Logic Array Blocks (LABs) β€” 32
User I/Os β€” 208
Propagation Delay (tPD) β€” 7.5 ns
Maximum Frequency (fCNT) β€” 116.3 MHz
Supply Voltage (VCCINT) β€” 3.3 V
Configuration Memory β€” EEPROM (non-volatile)
In-System Programmability β€” Yes (IEEE Std. 1532)
JTAG Boundary Scan β€” Yes (IEEE 1149.1)
PCI Compliance β€” PCI Local Bus Spec Rev. 2.2 (-10 speed grade)
Package β€” 208-pin PQFP

Datasheets & Resources

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