EPM3256AQC208-7N vs EPM3256AQC208-10 Comparison
Detailed side-by-side comparison of EPM3256AQC208-7N by Intel and EPM3256AQC208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3256AQC208-7N - MAX 3000A CPLD, 256 Macros, 7.5ns | Intel / Altera
EPM3256AQC208-7N β ActiveAltera
EPM3256AQC208-10 - MAX 3000A CPLD 256 Macrocells 10ns 208-PQFP | Intel / Altera
EPM3256AQC208-10 ObsoleteSpecification Comparison
| Parameter | EPM3256AQC208-7N | EPM3256AQC208-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.95 | $15.20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | β |
| Macro Cells | 256 | β |
| User I/Os | 161 | 161 |
| Logic Gates (Usable) | 5,000 | β |
| Propagation Delay (tPD) | 7.5 ns | β |
| Maximum Internal Frequency | 126.6 MHz | β |
| Supply Voltage VCCINT | 3.3 V | β |
| I/O Supply Voltage VCCIO | 3.3 V or 2.5 V (MultiVolt) | β |
| Programming Technology | EEPROM (non-volatile) | β |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | β |
| JTAG Boundary Scan | Yes | β |
| Operating Temperature | 0 C to +70 C (Commercial) | 0 Β°C to +70 Β°C (Commercial) |
| Package | 208-pin PQFP | 208-BFQFP (PQFP, Gull Wing) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Family | β | CMOS (EEPROM-based) |
| Macrocells | β | 256 |
| Usable Gates | β | 5,000 |
| Number of Pins | β | 208 |
| Pin-to-Pin Propagation Delay | β | 10 ns |
| Counter Frequency (max) | β | 227.3 MHz |
| Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Tolerance | β | MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant |
| Programming Interface | β | IEEE 1149.1 JTAG (ISP) |
| PCI-SIG Compliance | β | Yes (speed grades -4, -5, -6, -7, -10) |
| Global Clock Networks | β | 4 (CLK, CLR, OE, GCLK) |