EPM3256AT1144-10S vs EPM3256AQC208-10 Comparison

Detailed side-by-side comparison of EPM3256AT1144-10S by Intel and EPM3256AQC208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3256AT1144-10S EPM3256AQC208-10
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $21.30 $15.20
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 256 256
Logic Array Blocks (LABs) 16 β€”
Maximum User I/O Pins 212 β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Package TQFP-144 208-BFQFP (PQFP, Gull Wing)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +85C (commercial) 0 Β°C to +70 Β°C (Commercial)
Supply Voltage - Core 3.3 V β€”
I/O Voltage Support 2.5V / 3.3V / 5.0V MultiVolt β€”
Programmable Interconnect EEPROM-based, non-volatile β€”
In-System Programming Yes, via IEEE 1149.1 JTAG β€”
Configuration Cells EEPROM (instant-on, no external PROM) β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Logic Family β€” CMOS (EEPROM-based)
Usable Gates β€” 5,000
User I/Os β€” 161
Number of Pins β€” 208
Pin-to-Pin Propagation Delay β€” 10 ns
Counter Frequency (max) β€” 227.3 MHz
Supply Voltage (VCCINT) β€” 3.3 V
I/O Tolerance β€” MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant
Programming Interface β€” IEEE 1149.1 JTAG (ISP)
PCI-SIG Compliance β€” Yes (speed grades -4, -5, -6, -7, -10)
Global Clock Networks β€” 4 (CLK, CLR, OE, GCLK)

Datasheets & Resources

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