EPM3256ATI144-10 vs EPM3256ATI144-10N Comparison
Detailed side-by-side comparison of EPM3256ATI144-10 by Intel and EPM3256ATI144-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3256ATI144-10
EPM3256ATI144-10 - MAX 3000A 256-Macrocell 10ns CPLD | Intel
EPM3256ATI144-10 ObsoleteAltera
EPM3256ATI144-10N
EPM3256ATI144-10N - MAX 3000A CPLD, 256 Macro, 144-TQFP | Altera
EPM3256ATI144-10N ObsoleteSpecification Comparison
| Parameter | EPM3256ATI144-10 | EPM3256ATI144-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $10.25 |
| Series | MAX 3000A | β |
| Programmable Type | In-System Programmable (ISP), EEPROM-based | β |
| Number of Macrocells | 256 | β |
| Number of Logic Elements / Blocks | 16 LABs (Logic Array Blocks) | β |
| Number of Gates | 5,000 typical usable gates | β |
| Number of User I/O | 116 | β |
| Propagation Delay (tpd max) | 10 ns | β |
| Maximum Frequency (fmax) | 95.2 MHz | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | β |
| I/O Voltage Support | MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V mixed | 1.8 V / 2.5 V / 3.3 V (multi-voltage) |
| Logic Family | CMOS, EEPROM-based | β |
| Operating Temperature | -40Β°C to +85Β°C (industrial) | -40 C to +85 C (industrial, "I" suffix) |
| Package | 144-pin TQFP (20x20 mm) | 144-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) and IEEE Std. 1532 ISP | β |
| Compliance | IEEE Std. 1532 ISP, PCI-compatible I/O | β |
| Lifecycle Status | Obsolete (per HighqualityPCB listing) | β |
| Family | β | MAX 3000A |
| Device Type | β | CPLD - Complex Programmable Logic Device |
| Macrocells | β | 256 |
| Usable Gates | β | 5,000 |
| User I/Os | β | 116 |
| Logic Blocks / Logic Elements | β | 16 |
| Propagation Delay (tPD) | β | 10 ns |
| Max Frequency (fMAX) | β | 95.2 MHz |
| Supply Voltage - Core | β | 3.3 V |
| In-System Programmability | β | Yes, IEEE Std. 1532 compliant |
| Boundary-Scan Test (BST) | β | Yes, IEEE Std. 1149.1 (JTAG) |
| Lead-Free / Pb-Free | β | Yes ("N" suffix) |
| RoHS Status | β | Compliant |
| Process Technology | β | CMOS EEPROM-based, non-volatile |
| MSL Level | β | 3 (per JEDEC J-STD-020, typical for TQFP) |