EPM3256ATI144-10 vs EPM3256ATI144-7N Comparison

Detailed side-by-side comparison of EPM3256ATI144-10 by Intel and EPM3256ATI144-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM3256ATI144-10

EPM3256ATI144-10 - MAX 3000A 256-Macrocell 10ns CPLD | Intel

EPM3256ATI144-10 Obsolete
Altera
EPM3256ATI144-7N

EPM3256ATI144-7N - 256-Macrocell MAX 3000A CPLD, 7.5ns, TQFP-144 | Altera

EPM3256ATI144-7N Obsolete

Specification Comparison

Parameter EPM3256ATI144-10 EPM3256ATI144-7N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $10.95
Series MAX 3000A β€”
Programmable Type In-System Programmable (ISP), EEPROM-based β€”
Number of Macrocells 256 β€”
Number of Logic Elements / Blocks 16 LABs (Logic Array Blocks) β€”
Number of Gates 5,000 typical usable gates β€”
Number of User I/O 116 β€”
Propagation Delay (tpd max) 10 ns β€”
Maximum Frequency (fmax) 95.2 MHz β€”
Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) β€”
I/O Voltage Support MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V mixed β€”
Logic Family CMOS, EEPROM-based β€”
Operating Temperature -40Β°C to +85Β°C (industrial) -40C to +85C (industrial)
Package 144-pin TQFP (20x20 mm) TQFP-144 (20 x 20 mm, 0.5 mm pitch)
Mounting Type Surface Mount β€”
Programming Interface JTAG (IEEE 1149.1) and IEEE Std. 1532 ISP β€”
Compliance IEEE Std. 1532 ISP, PCI-compatible I/O β€”
Lifecycle Status Obsolete (per HighqualityPCB listing) β€”
Family β€” MAX 3000A
Device Type β€” CPLD (Complex Programmable Logic Device)
Macrocells β€” 256
Usable Gates β€” 5,000
Logic Array Blocks (LABs) β€” 16
Maximum User I/O Pins β€” 116
Propagation Delay (tPD) β€” 7.5 ns (typical)
Maximum Internal Frequency β€” 126.6 MHz
Core Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 3.3 V or 2.5 V
MultiVolt I/O Logic Levels β€” 5.0 V / 3.3 V / 2.5 V
Programming Technology β€” EEPROM (in-system programmable)
JTAG / ISP β€” IEEE Std. 1532 compliant
Boundary Scan β€” IEEE Std. 1149.1 (JTAG)
Hot-Socketing Support β€” Yes
RoHS Status β€” Compliant (lead-free)

Datasheets & Resources

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