EPM3256ATI144-7N vs EPM3256ATI144-10 Comparison
Detailed side-by-side comparison of EPM3256ATI144-7N by Altera and EPM3256ATI144-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3256ATI144-7N - 256-Macrocell MAX 3000A CPLD, 7.5ns, TQFP-144 | Altera
EPM3256ATI144-7N ObsoleteSpecification Comparison
| Parameter | EPM3256ATI144-7N | EPM3256ATI144-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $0.00 |
| Family | MAX 3000A | β |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 256 | β |
| Usable Gates | 5,000 | β |
| Logic Array Blocks (LABs) | 16 | β |
| Maximum User I/O Pins | 116 | β |
| Propagation Delay (tPD) | 7.5 ns (typical) | β |
| Maximum Internal Frequency | 126.6 MHz | β |
| Core Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V | β |
| MultiVolt I/O Logic Levels | 5.0 V / 3.3 V / 2.5 V | β |
| Programming Technology | EEPROM (in-system programmable) | β |
| JTAG / ISP | IEEE Std. 1532 compliant | β |
| Boundary Scan | IEEE Std. 1149.1 (JTAG) | β |
| Hot-Socketing Support | Yes | β |
| Package | TQFP-144 (20 x 20 mm, 0.5 mm pitch) | 144-pin TQFP (20x20 mm) |
| Operating Temperature | -40C to +85C (industrial) | -40Β°C to +85Β°C (industrial) |
| RoHS Status | Compliant (lead-free) | β |
| Series | β | MAX 3000A |
| Programmable Type | β | In-System Programmable (ISP), EEPROM-based |
| Number of Macrocells | β | 256 |
| Number of Logic Elements / Blocks | β | 16 LABs (Logic Array Blocks) |
| Number of Gates | β | 5,000 typical usable gates |
| Number of User I/O | β | 116 |
| Propagation Delay (tpd max) | β | 10 ns |
| Maximum Frequency (fmax) | β | 95.2 MHz |
| Supply Voltage (VCCINT) | β | 3.0 V to 3.6 V (3.3 V nominal) |
| I/O Voltage Support | β | MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V mixed |
| Logic Family | β | CMOS, EEPROM-based |
| Mounting Type | β | Surface Mount |
| Programming Interface | β | JTAG (IEEE 1149.1) and IEEE Std. 1532 ISP |
| Compliance | β | IEEE Std. 1532 ISP, PCI-compatible I/O |
| Lifecycle Status | β | Obsolete (per HighqualityPCB listing) |