EPM3512AFC256-10N vs EPM3512AFC256-10 Comparison
Detailed side-by-side comparison of EPM3512AFC256-10N by Altera and EPM3512AFC256-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AFC256-10
EPM3512AFC256-10 - MAX 3000A CPLD, 512 Macrocells | Intel / Altera
EPM3512AFC256-10 NrndSpecification Comparison
| Parameter | EPM3512AFC256-10N | EPM3512AFC256-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $43.22 | $17.50 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Usable Gates | 10000 | 10,000 |
| User I/O Pins | 208 | β |
| Logic Array Blocks (LABs) | [DATA_NEEDED: number of LABs] | 16 |
| Operating Frequency (fMAX) | [DATA_NEEDED: fMAX MHz] | β |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Setup Time (tSU) | 4.5 ns | β |
| VCCINT (Core Supply) | 3.3 V | β |
| VCCIO (I/O Supply) | 3.3 V or 2.5 V | β |
| Technology | CMOS EEPROM-based, non-volatile | β |
| Operating Temperature (Commercial) | 0 C to +70 C | β |
| Package | 256-ball FBGA (17 mm x 17 mm) | 256-pin FBGA |
| ISP Interface | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| Maximum I/O Pins | β | 208 |
| Maximum Counter Frequency | β | 87 MHz |
| Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Voltage Tolerance | β | 5-V tolerant |
| Programmable Technology | β | CMOS EEPROM |
| In-System Programmability | β | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| Operating Temperature Range | β | [DATA_NEEDED: industrial/commercial operating temperature range] |
| Pin Count | β | 256 |
| Architecture | β | MAX (Multiple Array matriX) EEPROM-based |