EPM3512AFC256-10N vs EPM3512AFC256-19 Comparison

Detailed side-by-side comparison of EPM3512AFC256-10N by Altera and EPM3512AFC256-19 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-10N EPM3512AFC256-19
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $43.22 $10.85
Family MAX 3000A MAX 3000A
Macrocells 512 512
Usable Gates 10000 10000
User I/O Pins 208 208
Logic Array Blocks (LABs) [DATA_NEEDED: number of LABs] 16
Operating Frequency (fMAX) [DATA_NEEDED: fMAX MHz] β€”
Pin-to-Pin Delay (tPD) 10 ns 7.5 ns
Setup Time (tSU) 4.5 ns β€”
VCCINT (Core Supply) 3.3 V β€”
VCCIO (I/O Supply) 3.3 V or 2.5 V β€”
Technology CMOS EEPROM-based, non-volatile β€”
Operating Temperature (Commercial) 0 C to +70 C β€”
Package 256-ball FBGA (17 mm x 17 mm) 256-ball FineLine BGA (FC)
ISP Interface IEEE Std. 1149.1 JTAG, IEEE Std. 1532 β€”
Mounting Type Surface Mount (BGA) Surface Mount
MSL Level [DATA_NEEDED: MSL rating] β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Device Type β€” CPLD (Complex Programmable Logic Device)
Maximum Operating Frequency β€” 80 MHz
Speed Grade β€” -19
Supply Voltage VCCINT β€” 3.3 V
I/O Supply Voltage VCCIO β€” 2.5 V or 3.3 V (5.0 V tolerant inputs)
Programming Interface β€” JTAG (IEEE 1149.1) / ISP (IEEE 1532)
Process Technology β€” 0.30 Β΅m CMOS EEPROM
Operating Temperature β€” -40C to +85C (industrial)
Non-volatile Configuration β€” Yes (EEPROM-based)

Datasheets & Resources

Browse All Products Create BOM Request Quote