EPM3512AFC256-10N vs EPM3512AFC256-21 Comparison

Detailed side-by-side comparison of EPM3512AFC256-10N by Altera and EPM3512AFC256-21 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-10N EPM3512AFC256-21
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $43.22 $18.75
Family MAX 3000A β€”
Macrocells 512 β€”
Usable Gates 10000 10,000
User I/O Pins 208 β€”
Logic Array Blocks (LABs) [DATA_NEEDED: number of LABs] 16
Operating Frequency (fMAX) [DATA_NEEDED: fMAX MHz] β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Setup Time (tSU) 4.5 ns β€”
VCCINT (Core Supply) 3.3 V β€”
VCCIO (I/O Supply) 3.3 V or 2.5 V β€”
Technology CMOS EEPROM-based, non-volatile β€”
Operating Temperature (Commercial) 0 C to +70 C β€”
Package 256-ball FBGA (17 mm x 17 mm) FBGA-256 (FineLine BGA)
ISP Interface IEEE Std. 1149.1 JTAG, IEEE Std. 1532 β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
MSL Level [DATA_NEEDED: MSL rating] β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Device Family β€” MAX 3000A
Logic Elements / Macrocells β€” 512 macrocells
Maximum Operating Frequency β€” 87 MHz
Operating Temperature β€” -40C to +85C (industrial)
Supply Voltage - Core (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 2.5 V / 3.3 V / 5.0 V (multi-volt I/O)
Programmable Pins (max) β€” [DATA_NEEDED: maximum user I/O pin count]
Programming Interface β€” JTAG / IEEE Std. 1532 ISP
Memory Type β€” Non-volatile EPROM/EEPROM cell array
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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