EPM3512AFC256-10N vs EPM3512AFC256-23 Comparison

Detailed side-by-side comparison of EPM3512AFC256-10N by Altera and EPM3512AFC256-23 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-10N EPM3512AFC256-23
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $43.22 $15.75
Family MAX 3000A MAX 3000A
Macrocells 512 512
Usable Gates 10000 10,000
User I/O Pins 208 [DATA_NEEDED: user I/O count for FC256]
Logic Array Blocks (LABs) [DATA_NEEDED: number of LABs] 16 (32 macrocells each)
Operating Frequency (fMAX) [DATA_NEEDED: fMAX MHz] β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Setup Time (tSU) 4.5 ns β€”
VCCINT (Core Supply) 3.3 V β€”
VCCIO (I/O Supply) 3.3 V or 2.5 V β€”
Technology CMOS EEPROM-based, non-volatile β€”
Operating Temperature (Commercial) 0 C to +70 C β€”
Package 256-ball FBGA (17 mm x 17 mm) 256-ball FineLine BGA (FC256), 17 mm x 17 mm
ISP Interface IEEE Std. 1149.1 JTAG, IEEE Std. 1532 β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
MSL Level [DATA_NEEDED: MSL rating] β€”
RoHS Status [DATA_NEEDED: RoHS status] β€”
Maximum Operating Frequency β€” 178.6 MHz
Propagation Delay (tPD) β€” 5.5 ns
Pin-to-Pin Delay β€” 23 ns
Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 2.5 V / 3.3 V / 5.0 V (MultiVolt)
Programming Interface β€” JTAG (IEEE Std. 1149.1) / ISP
Process Technology β€” 0.30 Β΅m CMOS EEPROM
Operating Temperature β€” [DATA_NEEDED: operating temperature grade]

Datasheets & Resources

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