EPM3512AFC256-19 vs EPM3512AFC256-10 Comparison

Detailed side-by-side comparison of EPM3512AFC256-19 by Altera and EPM3512AFC256-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-19 EPM3512AFC256-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $10.85 $17.50
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 512 512
Usable Gates 10000 10,000
Logic Array Blocks (LABs) 16 16
Maximum Operating Frequency 80 MHz β€”
Pin-to-Pin Delay (tPD) 7.5 ns 10 ns
Speed Grade -19 β€”
User I/O Pins 208 β€”
Package 256-ball FineLine BGA (FC) 256-pin FBGA
Supply Voltage VCCINT 3.3 V β€”
I/O Supply Voltage VCCIO 2.5 V or 3.3 V (5.0 V tolerant inputs) β€”
Programming Interface JTAG (IEEE 1149.1) / ISP (IEEE 1532) β€”
Process Technology 0.30 Β΅m CMOS EEPROM β€”
Operating Temperature -40C to +85C (industrial) β€”
Non-volatile Configuration Yes (EEPROM-based) β€”
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: RoHS status] unknown
Maximum I/O Pins β€” 208
Maximum Counter Frequency β€” 87 MHz
Supply Voltage (VCCINT) β€” 3.3 V
I/O Voltage Tolerance β€” 5-V tolerant
Programmable Technology β€” CMOS EEPROM
In-System Programmability β€” Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532)
Operating Temperature Range β€” [DATA_NEEDED: industrial/commercial operating temperature range]
Pin Count β€” 256
Architecture β€” MAX (Multiple Array matriX) EEPROM-based

Datasheets & Resources

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