EPM3512AFC256-19 vs EPM3512AFC256-10N Comparison

Detailed side-by-side comparison of EPM3512AFC256-19 by Altera and EPM3512AFC256-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-19 EPM3512AFC256-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $10.85 $43.22
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 512 512
Usable Gates 10000 10000
Logic Array Blocks (LABs) 16 [DATA_NEEDED: number of LABs]
Maximum Operating Frequency 80 MHz β€”
Pin-to-Pin Delay (tPD) 7.5 ns 10 ns
Speed Grade -19 β€”
User I/O Pins 208 208
Package 256-ball FineLine BGA (FC) 256-ball FBGA (17 mm x 17 mm)
Supply Voltage VCCINT 3.3 V β€”
I/O Supply Voltage VCCIO 2.5 V or 3.3 V (5.0 V tolerant inputs) β€”
Programming Interface JTAG (IEEE 1149.1) / ISP (IEEE 1532) β€”
Process Technology 0.30 Β΅m CMOS EEPROM β€”
Operating Temperature -40C to +85C (industrial) β€”
Non-volatile Configuration Yes (EEPROM-based) β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Operating Frequency (fMAX) β€” [DATA_NEEDED: fMAX MHz]
Setup Time (tSU) β€” 4.5 ns
VCCINT (Core Supply) β€” 3.3 V
VCCIO (I/O Supply) β€” 3.3 V or 2.5 V
Technology β€” CMOS EEPROM-based, non-volatile
Operating Temperature (Commercial) β€” 0 C to +70 C
ISP Interface β€” IEEE Std. 1149.1 JTAG, IEEE Std. 1532
MSL Level β€” [DATA_NEEDED: MSL rating]

Datasheets & Resources

Browse All Products Create BOM Request Quote