EPM3512AFC256-21 vs EPM3512AFC256-18 Comparison
Detailed side-by-side comparison of EPM3512AFC256-21 by Altera and EPM3512AFC256-18 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AFC256-18 - MAX 3000A CPLD, 512 Macrocells, BGA-256 | Altera
EPM3512AFC256-18 ObsoleteSpecification Comparison
| Parameter | EPM3512AFC256-21 | EPM3512AFC256-18 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $18.75 | $17.20 |
| Device Family | MAX 3000A | β |
| Logic Elements / Macrocells | 512 macrocells | β |
| Usable Gates | 10,000 | β |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum Operating Frequency | 87 MHz | β |
| Package | FBGA-256 (FineLine BGA) | 256-ball FineLine BGA (FCBGA) |
| Operating Temperature | -40C to +85C (industrial) | [DATA_NEEDED: industrial/commercial grade] |
| Supply Voltage - Core (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) | β |
| Programmable Pins (max) | [DATA_NEEDED: maximum user I/O pin count] | β |
| Programming Interface | JTAG / IEEE Std. 1532 ISP | β |
| Memory Type | Non-volatile EPROM/EEPROM cell array | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: not specified in retrieved data] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Family | β | MAX 3000A |
| Macrocells | β | 512 |
| Maximum User I/O Pins | β | 212 |
| Pin-to-Pin Delay (tPD1) | β | 18 ns |
| Global Clock Networks | β | 4 |
| VCCINT (Core Supply) | β | 3.0 V to 3.6 V (3.3 V typical) |
| VCCIO (I/O Supply) | β | 2.5 V or 3.3 V (MultiVolt) |
| Programming Technology | β | EEPROM (non-volatile) |
| In-System Programming | β | IEEE Std. 1532 / JTAG (IEEE Std. 1149.1) |
| Ball Pitch | β | 1.0 mm |