EPM3512AFC256-21 vs EPM3512AFC256-20 Comparison

Detailed side-by-side comparison of EPM3512AFC256-21 by Altera and EPM3512AFC256-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-21 EPM3512AFC256-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $18.75 $9.75
Device Family MAX 3000A β€”
Logic Elements / Macrocells 512 macrocells β€”
Usable Gates 10,000 β€”
Logic Array Blocks (LABs) 16 β€”
Maximum Operating Frequency 87 MHz β€”
Package FBGA-256 (FineLine BGA) 256-ball FBGA (Fine-pitch BGA)
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: operating temperature range]
Supply Voltage - Core (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) β€”
Programmable Pins (max) [DATA_NEEDED: maximum user I/O pin count] β€”
Programming Interface JTAG / IEEE Std. 1532 ISP β€”
Memory Type Non-volatile EPROM/EEPROM cell array β€”
Mounting Type Surface Mount (BGA) Surface Mount
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Lead-Free [DATA_NEEDED: lead-free status] β€”
Family β€” MAX 3000A
Macrocells β€” 512
Typical Usable Gates β€” 10,000
Speed Grade β€” -20 (20 ns tPD)
Pin Count β€” 256
Operating Voltage (VCCINT) β€” 3.3 V (3.0 V to 3.6 V)
I/O Voltage (VCCIO) β€” 2.5 V or 3.3 V (5.0 V tolerant inputs)
I/O Standards β€” LVTTL, LVCMOS, 2.5 V, 3.3 V, 5.0 V tolerant
Program Memory Type β€” EEPROM (non-volatile)
In-System Programmability β€” Yes (JTAG IEEE 1149.1)
JTAG Support β€” Yes (boundary-scan + ISP)
MSL Level β€” [DATA_NEEDED: MSL moisture sensitivity level]
Configuration Memory β€” Internal EEPROM

Datasheets & Resources

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