EPM3512AFC256-23 vs EPM3512AFC256-20 Comparison

Detailed side-by-side comparison of EPM3512AFC256-23 by Altera and EPM3512AFC256-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AFC256-20

EPM3512AFC256-20 - MAX 3000A CPLD, 512 Macrocells, BGA-256 | Altera

EPM3512AFC256-20 Obsolete

Specification Comparison

Parameter EPM3512AFC256-23 EPM3512AFC256-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $15.75 $9.75
Family MAX 3000A MAX 3000A
Macrocells 512 512
Usable Gates 10,000 β€”
Logic Array Blocks (LABs) 16 (32 macrocells each) β€”
Maximum Operating Frequency 178.6 MHz β€”
Propagation Delay (tPD) 5.5 ns β€”
Pin-to-Pin Delay 23 ns β€”
Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) β€”
User I/O Pins [DATA_NEEDED: user I/O count for FC256] β€”
Package 256-ball FineLine BGA (FC256), 17 mm x 17 mm 256-ball FBGA (Fine-pitch BGA)
Programming Interface JTAG (IEEE Std. 1149.1) / ISP β€”
Process Technology 0.30 Β΅m CMOS EEPROM β€”
Operating Temperature [DATA_NEEDED: operating temperature grade] [DATA_NEEDED: operating temperature range]
Mounting Type Surface Mount (BGA) Surface Mount
Typical Usable Gates β€” 10,000
Speed Grade β€” -20 (20 ns tPD)
Pin Count β€” 256
Operating Voltage (VCCINT) β€” 3.3 V (3.0 V to 3.6 V)
I/O Voltage (VCCIO) β€” 2.5 V or 3.3 V (5.0 V tolerant inputs)
I/O Standards β€” LVTTL, LVCMOS, 2.5 V, 3.3 V, 5.0 V tolerant
Program Memory Type β€” EEPROM (non-volatile)
In-System Programmability β€” Yes (JTAG IEEE 1149.1)
JTAG Support β€” Yes (boundary-scan + ISP)
RoHS Status β€” [DATA_NEEDED: RoHS compliance status]
MSL Level β€” [DATA_NEEDED: MSL moisture sensitivity level]
Configuration Memory β€” Internal EEPROM

Datasheets & Resources

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