EPM3512AFC256-2N vs EPM3512AFC256-23 Comparison

Detailed side-by-side comparison of EPM3512AFC256-2N by Intel and EPM3512AFC256-23 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-2N EPM3512AFC256-23
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $25.80 $15.75
Family MAX 3000A MAX 3000A
Macrocells 512 512
Logic Array Blocks (LABs) 32 16 (32 macrocells each)
Maximum User I/O Pins 212 β€”
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns] 5.5 ns
Maximum Operating Frequency [DATA_NEEDED: fMAX in MHz] 178.6 MHz
Process Technology 0.30 Β΅m CMOS EEPROM 0.30 Β΅m CMOS EEPROM
Configuration Memory Non-volatile EEPROM β€”
In-System Programmability IEEE Std. 1532 JTAG β€”
VCCINT (Core Supply) 3.3 V β€”
VCCIO (I/O Supply) 2.5 V / 3.3 V / 5.0 V MultiVolt β€”
PCI Compliance 3.3 V PCI-compliant β€”
Package 256-ball FineLine BGA (FC-256) 256-ball FineLine BGA (FC256), 17 mm x 17 mm
Operating Temperature (Commercial) 0 Β°C to +70 Β°C β€”
RoHS Status Compliant β€”
Lead-Free Yes β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
Usable Gates β€” 10,000
Pin-to-Pin Delay β€” 23 ns
Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 2.5 V / 3.3 V / 5.0 V (MultiVolt)
User I/O Pins β€” [DATA_NEEDED: user I/O count for FC256]
Programming Interface β€” JTAG (IEEE Std. 1149.1) / ISP
Operating Temperature β€” [DATA_NEEDED: operating temperature grade]

Datasheets & Resources

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