EPM3512AFI256-7N vs EPM3512ATC256-10N Comparison

Detailed side-by-side comparison of EPM3512AFI256-7N by Altera and EPM3512ATC256-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AFI256-7N EPM3512AFI256-7N - MAX 3000A CPLD, 512 Macrocells | Intel / Altera

EPM3512AFI256-7N - MAX 3000A CPLD, 512 Macrocells | Intel / Altera

EPM3512AFI256-7N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3512AFI256-7N EPM3512ATC256-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $27.95 $20.10
Family MAX 3000A MAX 3000A
Device Logic Elements / Macrocells 512 macrocells β€”
Typical Usable Gates 10,000 gates β€”
Logic Array Blocks (LABs) 16 16
Maximum User I/O Pins [DATA_NEEDED: user I/O count] 208
Maximum Operating Frequency (fMAX) 116.3 MHz β€”
Pin-to-Pin Delay (tPD, speed grade -7) approximately 7.5 ns β€”
Supply Voltage (VCCINT) 3.3 V β€”
MultiVolt I/O Levels 2.5 V / 3.3 V / 5 V mixed β€”
Configuration Memory Non-volatile EEPROM β€”
Programming Interface IEEE 1149.1 JTAG (in-system programmable) JTAG (IEEE Std. 1149.1) - in-system programmable
Package 256-ball FBGA FBGA-256 (FineLine BGA, 17x17 mm, 1.0 mm pitch)
Operating Temperature Range -40C to +85C (industrial) β€”
Lead-Free / RoHS Yes ('N' suffix, lead-free) β€”
Design Software Quartus II (legacy MAX 3000A support) β€”
Speed Grade -7 β€”
Mounting Type Surface Mount (BGA) Surface Mount
Device Type β€” CPLD (Complex Programmable Logic Device)
Macrocells β€” 512
Propagation Delay (tPD1) β€” 10 ns
Core Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt)
Operating Temperature β€” 0 C to +70 C (commercial, "C" suffix)
Process Technology β€” 0.30 um CMOS EEPROM
RoHS Status β€” unknown
Lead-Free β€” unknown

Datasheets & Resources

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