EPM3512AQ208-10N vs EPM3512AQC20-10 Comparison
Detailed side-by-side comparison of EPM3512AQ208-10N by Altera and EPM3512AQC20-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AQ208-10N - MAX 3000A CPLD, 512 Macrocells, 172 I/O | Altera
EPM3512AQ208-10N β Active
Specification Comparison
| Parameter | EPM3512AQ208-10N | EPM3512AQC20-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.40 | $21.10 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 512 | 512 |
| Usable Gates | 10,000 | β |
| User I/Os | 172 | β |
| Logic Array Blocks (LABs) | 32 | 16 |
| Package | 208-pin PQFP | PQFP-240 (QC20 designation per Altera ordering code) |
| Speed Grade | -10 (10 ns pin-to-pin delay) | β |
| Pin-to-Pin Delay (tPD) | 4.5 ns (typical) | 10 ns |
| Maximum Frequency (fCNT) | 227.3 MHz | 116.3 MHz |
| Core Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 2.5 V, 3.3 V, or 5.0 V | β |
| Process Technology | CMOS EEPROM | 0.30 Β΅m EEPROM CMOS |
| Programming Interface | IEEE Std. 1532 (JTAG) ISP | IEEE 1149.1 (JTAG) - In-System Programmable |
| Operating Temperature (Industrial) | -40 C to +85 C | β |
| Mounting Type | Surface Mount | β |
| RoHS Status | unknown | Compliant (lead-free PQFP package) |
| Macrocells per LAB | β | 32 |
| User I/O Pins | β | 100 |
| Supply Voltage VCCINT | β | 5.0 V |
| MultiVolt I/O Voltages | β | 5.0 V / 3.3 V / 2.5 V / 1.8 V |
| Operating Temperature | β | 0C to +70C (commercial) |