EPM3512AQC208-10-10N vs EPM3512AQI208-10N Comparison
Detailed side-by-side comparison of EPM3512AQC208-10-10N by Altera and EPM3512AQI208-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AQC208-10-10N - MAX 3000A CPLD 512 Macrocells 208-PQFP | Altera
EPM3512AQC208-10-10N ObsoleteSpecification Comparison
| Parameter | EPM3512AQC208-10-10N | EPM3512AQI208-10N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $31.20 | $12.90 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | β |
| Usable Gates | 10,000 | β |
| User I/Os | 172 | 172 (max), 208-pin package |
| Logic Elements / LABs | 16 Logic Array Blocks | β |
| Propagation Delay (tPD) | 10 ns (-10 speed grade) | 10 ns |
| Maximum Frequency (fCNT) | 87 MHz | β |
| Supply Voltage - Core (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V | β |
| Process Technology | CMOS EEPROM | β |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | β |
| Boundary-Scan (JTAG) | Yes, IEEE 1149.1 | β |
| PCI-SIG Compliance | PCI Local Bus Specification Rev 2.2 (at -10 speed grade) | β |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial) | 0C to 70C |
| Package | 208-pin PQFP (Plastic Quad Flat Pack) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS status] | β |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Family | β | CMOS EEPROM-based |
| Macro Cells | β | 512 |
| Logic Array Blocks (LABs) | β | 12 |
| Supply Voltage | β | 3.3 V |
| I/O Standards | β | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) |
| Package Type | β | PQFP-208 (FINE LINE BGA-style 256-pin land) |
| Pins | β | 256 (package), 208 used |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP (IEEE 1532) |
| Compliance | β | RoHS status unknown from data |
| Boundary Scan | β | Built-in BST (IEEE 1149.1) |
| Configuration Memory | β | On-chip EEPROM, non-volatile |