EPM3512AQC208-10 vs EPM3512AQ208-10N Comparison
Detailed side-by-side comparison of EPM3512AQC208-10 by Altera and EPM3512AQ208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AQC208-10
EPM3512AQC208-10 - MAX 3000A CPLD 512 Macrocells | Intel/Altera
EPM3512AQC208-10 ObsoleteAltera
EPM3512AQ208-10N
EPM3512AQ208-10N - MAX 3000A CPLD, 512 Macrocells, 172 I/O | Altera
EPM3512AQ208-10N β ActiveSpecification Comparison
| Parameter | EPM3512AQC208-10 | EPM3512AQ208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $22.10 | $21.40 |
| Family | MAX 3000A | MAX 3000A |
| Usable Gates | 10,000 | 10,000 |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 32 | 32 |
| User I/Os | 208 | 172 |
| Propagation Delay (tPD) | 7.5 ns | β |
| Maximum Frequency (fCNT) | 116.3 MHz | 227.3 MHz |
| Supply Voltage (VCCINT) | 3.3 V | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| In-System Programmability | Yes (IEEE Std. 1532) | β |
| JTAG Boundary Scan | Yes (IEEE 1149.1) | β |
| PCI Compliance | PCI Local Bus Spec Rev. 2.2 (-10 speed grade) | β |
| Package | 208-pin PQFP | 208-pin PQFP |
| Operating Temperature | 0C to +70 C (commercial) | β |
| RoHS Status | [DATA_NEEDED: RoHS status not in verified data] | unknown |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Speed Grade | β | -10 (10 ns pin-to-pin delay) |
| Pin-to-Pin Delay (tPD) | β | 4.5 ns (typical) |
| Core Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Supply Voltage (VCCIO) | β | 2.5 V, 3.3 V, or 5.0 V |
| Process Technology | β | CMOS EEPROM |
| Programming Interface | β | IEEE Std. 1532 (JTAG) ISP |
| Operating Temperature (Industrial) | β | -40 C to +85 C |
| Mounting Type | β | Surface Mount |