EPM3512AQC208-10N vs EPM3512AQC208-2 Comparison

Detailed side-by-side comparison of EPM3512AQC208-10N by Intel and EPM3512AQC208-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AQC208-10N EPM3512AQC208-2
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $42.80 $18.75
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 512 512
Usable Gates Up to 10,000 β€”
Logic Array Blocks (LABs) 16 16
User I/Os 172 β€”
Package 208-pin PQFP (Plastic Quad Flat Pack) PQFP-208 (QC)
Supply Voltage 3.3 V β€”
Pin-to-Pin Delay 4.5 ns (-10 speed grade) β€”
Maximum Internal Frequency 227.3 MHz β€”
Speed Grade -10 -2
Process Technology CMOS EEPROM 0.30 Β΅m EEPROM
In-System Programming IEEE Std. 1149.1 JTAG, IEEE Std. 1532 β€”
Boundary-Scan Test (BST) Built-in, IEEE 1149.1 compliant β€”
I/O Standards MultiVolt (1.8V / 2.5V / 3.3V) β€”
Operating Temperature 0 C to 70 C (commercial) β€”
RoHS Status [DATA_NEEDED: RoHS status not in verified web data] Non-compliant (legacy PQFP)
User I/O Pins β€” 172
Supply Voltage (Core) β€” 3.3 V
Output Drive Voltage β€” 2.5 V / 3.3 V programmable
Input Voltage Tolerance β€” 2.5 V / 3.3 V / 5.0 V
Program/Erase Endurance β€” 100 cycles (typical)
In-System Programmability β€” Yes (IEEE 1149.1 JTAG)
User I/O Banks β€” 4
Operating Temperature Range β€” Commercial (0C to +70C)
Mounting Type β€” Surface Mount
Lead-Free β€” No (SnPb lead finish)
Security Bit β€” Yes (programmable)

Datasheets & Resources

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