EPM3512AQC208-10NS vs EPM3512AQC20-10 Comparison
Detailed side-by-side comparison of EPM3512AQC208-10NS by Altera and EPM3512AQC20-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AQC208-10NS - MAX 3000A 512-Macro CPLD, 208-PQFP | Altera
EPM3512AQC208-10NS β Active
Specification Comparison
| Parameter | EPM3512AQC208-10NS | EPM3512AQC20-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $32.40 | $21.10 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 512 | β |
| Usable Gates | 10,000 | β |
| Logic Array Blocks (LABs) | 12 | 16 |
| User I/Os | 172 | β |
| Pin-to-Pin Delay (tPD) | 10 ns (speed grade -10) | 10 ns |
| Internal Counter Frequency | 227.3 MHz max | β |
| Propagation Delay | 7.5 ns (datasheet figure) | β |
| Core Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | β |
| Logic Family | CMOS, EEPROM-based | β |
| Configuration | Non-volatile EEPROM, in-system programmable (JTAG IEEE 1532) | β |
| Package | 208-pin PQFP | PQFP-240 (QC20 designation per Altera ordering code) |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| ISP Standard | IEEE Std. 1532 | β |
| RoHS Status | [DATA_NEEDED: rohs status] | Compliant (lead-free PQFP package) |
| Mounting Type | Surface Mount | β |
| Macrocells | β | 512 |
| Macrocells per LAB | β | 32 |
| User I/O Pins | β | 100 |
| Maximum Frequency (fCNT) | β | 116.3 MHz |
| Supply Voltage VCCINT | β | 5.0 V |
| MultiVolt I/O Voltages | β | 5.0 V / 3.3 V / 2.5 V / 1.8 V |
| Programming Interface | β | IEEE 1149.1 (JTAG) - In-System Programmable |
| Process Technology | β | 0.30 Β΅m EEPROM CMOS |