EPM3512AQC208-10NS vs EPM3512AQC208-15N Comparison

Detailed side-by-side comparison of EPM3512AQC208-10NS by Altera and EPM3512AQC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AQC208-10NS

EPM3512AQC208-10NS - MAX 3000A 512-Macro CPLD, 208-PQFP | Altera

EPM3512AQC208-10NS βœ“ Active
Altera
EPM3512AQC208-15N

EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera

EPM3512AQC208-15N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3512AQC208-10NS EPM3512AQC208-15N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $32.40 $20.50
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD - Complex Programmable Logic Device
Macro Cells 512 512
Usable Gates 10,000 β€”
Logic Array Blocks (LABs) 12 16
User I/Os 172 β€”
Pin-to-Pin Delay (tPD) 10 ns (speed grade -10) 15 ns
Internal Counter Frequency 227.3 MHz max β€”
Propagation Delay 7.5 ns (datasheet figure) β€”
Core Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) 2.5 V / 3.3 V (MultiVolt)
Logic Family CMOS, EEPROM-based β€”
Configuration Non-volatile EEPROM, in-system programmable (JTAG IEEE 1532) β€”
Package 208-pin PQFP PQFP-208 (QC208)
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
ISP Standard IEEE Std. 1532 β€”
RoHS Status [DATA_NEEDED: rohs status] [DATA_NEEDED: RoHS status]
Mounting Type Surface Mount Surface Mount
Maximum User I/O Pins β€” 172
Typical Usable Gates β€” 12,000
Number of Logic Elements β€” 512
Operating Supply Voltage (VCCINT) β€” 3.3 V
Programmable I/O Standards β€” LVTTL, LVCMOS, PCI (with external resistor)
In-System Programmability β€” Yes (IEEE Std. 1532 compliant)
Configuration Memory β€” EEPROM (non-volatile)
JTAG Support β€” Yes (BST/Boundary-Scan Test)

Datasheets & Resources

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