EPM3512AQC208-2 vs EPM3512AQC208-10N Comparison

Detailed side-by-side comparison of EPM3512AQC208-2 by Altera and EPM3512AQC208-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AQC208-2

EPM3512AQC208-2 - MAX 3000A CPLD, 512 Macrocells, 172 I/O | Altera

EPM3512AQC208-2 Obsolete
Intel
EPM3512AQC208-10N

EPM3512AQC208-10N - 512-MacroCell MAX 3000A CPLD, 208-PQFP | Intel

EPM3512AQC208-10N Obsolete

Specification Comparison

Parameter EPM3512AQC208-2 EPM3512AQC208-10N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $18.75 $42.80
Family MAX 3000A MAX 3000A
Macrocells 512 512
User I/O Pins 172 β€”
Logic Array Blocks (LABs) 16 16
Speed Grade -2 -10
Package PQFP-208 (QC) 208-pin PQFP (Plastic Quad Flat Pack)
Supply Voltage (Core) 3.3 V β€”
Output Drive Voltage 2.5 V / 3.3 V programmable β€”
Input Voltage Tolerance 2.5 V / 3.3 V / 5.0 V β€”
Process Technology 0.30 Β΅m EEPROM CMOS EEPROM
Program/Erase Endurance 100 cycles (typical) β€”
In-System Programmability Yes (IEEE 1149.1 JTAG) β€”
User I/O Banks 4 β€”
Operating Temperature Range Commercial (0C to +70C) β€”
Mounting Type Surface Mount β€”
RoHS Status Non-compliant (legacy PQFP) [DATA_NEEDED: RoHS status not in verified web data]
Lead-Free No (SnPb lead finish) β€”
Security Bit Yes (programmable) β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Usable Gates β€” Up to 10,000
User I/Os β€” 172
Supply Voltage β€” 3.3 V
Pin-to-Pin Delay β€” 4.5 ns (-10 speed grade)
Maximum Internal Frequency β€” 227.3 MHz
In-System Programming β€” IEEE Std. 1149.1 JTAG, IEEE Std. 1532
Boundary-Scan Test (BST) β€” Built-in, IEEE 1149.1 compliant
I/O Standards β€” MultiVolt (1.8V / 2.5V / 3.3V)
Operating Temperature β€” 0 C to 70 C (commercial)

Datasheets & Resources

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