EPM3512AQC208-2 vs EPM3512AQC208-15N Comparison
Detailed side-by-side comparison of EPM3512AQC208-2 by Altera and EPM3512AQC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AQC208-2
EPM3512AQC208-2 - MAX 3000A CPLD, 512 Macrocells, 172 I/O | Altera
EPM3512AQC208-2 ObsoleteAltera
EPM3512AQC208-15N
EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera
EPM3512AQC208-15N β Last Time BuySpecification Comparison
| Parameter | EPM3512AQC208-2 | EPM3512AQC208-15N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $18.75 | $20.50 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | β |
| User I/O Pins | 172 | β |
| Logic Array Blocks (LABs) | 16 | 16 |
| Speed Grade | -2 | β |
| Package | PQFP-208 (QC) | PQFP-208 (QC208) |
| Supply Voltage (Core) | 3.3 V | β |
| Output Drive Voltage | 2.5 V / 3.3 V programmable | β |
| Input Voltage Tolerance | 2.5 V / 3.3 V / 5.0 V | β |
| Process Technology | 0.30 Β΅m EEPROM | β |
| Program/Erase Endurance | 100 cycles (typical) | β |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (IEEE Std. 1532 compliant) |
| User I/O Banks | 4 | β |
| Operating Temperature Range | Commercial (0C to +70C) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Non-compliant (legacy PQFP) | [DATA_NEEDED: RoHS status] |
| Lead-Free | No (SnPb lead finish) | β |
| Security Bit | Yes (programmable) | β |
| Device Type | β | CPLD - Complex Programmable Logic Device |
| Macro Cells | β | 512 |
| Maximum User I/O Pins | β | 172 |
| Typical Usable Gates | β | 12,000 |
| Number of Logic Elements | β | 512 |
| Pin-to-Pin Delay (tPD) | β | 15 ns |
| Operating Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Supply Voltage (VCCIO) | β | 2.5 V / 3.3 V (MultiVolt) |
| Programmable I/O Standards | β | LVTTL, LVCMOS, PCI (with external resistor) |
| Configuration Memory | β | EEPROM (non-volatile) |
| JTAG Support | β | Yes (BST/Boundary-Scan Test) |
| Operating Temperature | β | 0C to +70C (commercial) |