EPM3512AQC208-2 vs EPM3512AQC208-7N Comparison
Detailed side-by-side comparison of EPM3512AQC208-2 by Altera and EPM3512AQC208-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AQC208-2
EPM3512AQC208-2 - MAX 3000A CPLD, 512 Macrocells, 172 I/O | Altera
EPM3512AQC208-2 ObsoleteAltera
EPM3512AQC208-7N
EPM3512AQC208-7N - 512-Macro MAX 3000A CPLD, 208-PQFP | Altera
EPM3512AQC208-7N β Last Time BuySpecification Comparison
| Parameter | EPM3512AQC208-2 | EPM3512AQC208-7N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $18.75 | $41.41 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | β |
| User I/O Pins | 172 | β |
| Logic Array Blocks (LABs) | 16 | 32 |
| Speed Grade | -2 | -7 |
| Package | PQFP-208 (QC) | 208-Pin PQFP / FQFP-208 (Plastic Quad Flat Pack, gull-wing) |
| Supply Voltage (Core) | 3.3 V | β |
| Output Drive Voltage | 2.5 V / 3.3 V programmable | β |
| Input Voltage Tolerance | 2.5 V / 3.3 V / 5.0 V | β |
| Process Technology | 0.30 Β΅m EEPROM | 0.30 Β΅m CMOS EEPROM |
| Program/Erase Endurance | 100 cycles (typical) | β |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | β |
| User I/O Banks | 4 | β |
| Operating Temperature Range | Commercial (0C to +70C) | β |
| Mounting Type | Surface Mount | β |
| RoHS Status | Non-compliant (legacy PQFP) | Compliant |
| Lead-Free | No (SnPb lead finish) | β |
| Security Bit | Yes (programmable) | β |
| Logic Capacity | β | 512 macrocells, 10,000 usable gates |
| Macrocells per LAB | β | 16 |
| User I/Os | β | 172 |
| Propagation Delay (tPD) | β | 7.5 ns |
| Maximum Frequency (fCNT) | β | 116.3 MHz |
| Supply Voltage (VCCINT) | β | 3.3 V (3.0 V to 3.6 V) |
| I/O Bank Count | β | 4 (MultiVolt) |
| Supported I/O Standards | β | 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS |
| Configuration | β | Non-volatile EEPROM, in-system programmable (ISP) |
| JTAG Interface | β | IEEE 1149.1 BST + IEEE 1532 ISP |
| Operating Temperature | β | 0 Β°C to +70 Β°C (commercial) |