EPM3512AQC208-7 vs EPM3512AQC208-15N Comparison

Detailed side-by-side comparison of EPM3512AQC208-7 by Intel and EPM3512AQC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AQC208-15N

EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera

EPM3512AQC208-15N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3512AQC208-7 EPM3512AQC208-15N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $41.72 $20.50
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD - Complex Programmable Logic Device
Macrocells 512 β€”
Usable Gates 10,000 β€”
Propagation Delay (tPD) 7.5 ns β€”
Counter Frequency (fCNT) 116.3 MHz β€”
User I/Os 172 β€”
Logic Elements / LEs N/A (CPLD macrocell architecture) β€”
Supply Voltage (VCCINT) 3.3 V β€”
I/O Standards Supported 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) β€”
Package 208-Pin PQFP (FQFP, gull-wing) PQFP-208 (QC208)
Operating Temperature 0 C to +70 C (commercial) 0C to +70C (commercial)
Programming In-System Programmable via JTAG (IEEE Std. 1532) β€”
Process Technology CMOS EEPROM, 0.30 um β€”
RoHS Status Compliant [DATA_NEEDED: RoHS status]
Lead-Free Yes β€”
Macro Cells β€” 512
Logic Array Blocks (LABs) β€” 16
Maximum User I/O Pins β€” 172
Typical Usable Gates β€” 12,000
Number of Logic Elements β€” 512
Pin-to-Pin Delay (tPD) β€” 15 ns
Operating Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 2.5 V / 3.3 V (MultiVolt)
Programmable I/O Standards β€” LVTTL, LVCMOS, PCI (with external resistor)
In-System Programmability β€” Yes (IEEE Std. 1532 compliant)
Configuration Memory β€” EEPROM (non-volatile)
JTAG Support β€” Yes (BST/Boundary-Scan Test)
Mounting Type β€” Surface Mount

Datasheets & Resources

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