EPM3512AQC208-7N vs EPM3512AQC20810N Comparison

Detailed side-by-side comparison of EPM3512AQC208-7N by Altera and EPM3512AQC20810N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AQC208-7N EPM3512AQC208-7N - 512-Macro MAX 3000A CPLD, 208-PQFP | Altera

EPM3512AQC208-7N - 512-Macro MAX 3000A CPLD, 208-PQFP | Altera

EPM3512AQC208-7N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3512AQC208-7N EPM3512AQC20810N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $41.41 $39.75
Family MAX 3000A MAX 3000A
Logic Capacity 512 macrocells, 10,000 usable gates β€”
Logic Array Blocks (LABs) 32 16
Macrocells per LAB 16 β€”
User I/Os 172 172
Propagation Delay (tPD) 7.5 ns 10 ns
Maximum Frequency (fCNT) 116.3 MHz β€”
Supply Voltage (VCCINT) 3.3 V (3.0 V to 3.6 V) β€”
I/O Bank Count 4 (MultiVolt) β€”
Supported I/O Standards 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS β€”
Process Technology 0.30 Β΅m CMOS EEPROM β€”
Configuration Non-volatile EEPROM, in-system programmable (ISP) β€”
JTAG Interface IEEE 1149.1 BST + IEEE 1532 ISP β€”
Package 208-Pin PQFP / FQFP-208 (Plastic Quad Flat Pack, gull-wing) 208-pin PQFP (Plastic Quad Flat Pack)
Operating Temperature 0 Β°C to +70 Β°C (commercial) [DATA_NEEDED: industrial/commercial grade range]
RoHS Status Compliant [DATA_NEEDED: lead-free/RoHS status]
Speed Grade -7 β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Macro Cells β€” 512
Usable Gates β€” 10,000
Core Voltage (VCCINT) β€” 3.3 V
I/O Voltage (VCCIO) β€” 3.3 V (5.0 V tolerant I/O)
Configuration Memory β€” EEPROM (non-volatile, instant-on)
Programming Interface β€” JTAG (IEEE 1149.1 / IEEE 1532 ISP)
Maximum Frequency β€” [DATA_NEEDED: fMAX]
Mounting Type β€” Surface Mount
MSL Level β€” [DATA_NEEDED: MSL rating]

Datasheets & Resources

Browse All Products Create BOM Request Quote