EPM3512AQC20810N vs EPM3512AQC208-10 Comparison

Detailed side-by-side comparison of EPM3512AQC20810N by Altera and EPM3512AQC208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AQC20810N EPM3512AQC208-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $39.75 $22.10
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 512 β€”
Usable Gates 10,000 10,000
User I/Os 172 208
Logic Array Blocks (LABs) 16 32
Propagation Delay (tPD) 10 ns 7.5 ns
Core Voltage (VCCINT) 3.3 V β€”
I/O Voltage (VCCIO) 3.3 V (5.0 V tolerant I/O) β€”
Package 208-pin PQFP (Plastic Quad Flat Pack) 208-pin PQFP
Configuration Memory EEPROM (non-volatile, instant-on) EEPROM (non-volatile)
Programming Interface JTAG (IEEE 1149.1 / IEEE 1532 ISP) β€”
Maximum Frequency [DATA_NEEDED: fMAX] β€”
Operating Temperature [DATA_NEEDED: industrial/commercial grade range] 0C to +70 C (commercial)
RoHS Status [DATA_NEEDED: lead-free/RoHS status] [DATA_NEEDED: RoHS status not in verified data]
Mounting Type Surface Mount β€”
MSL Level [DATA_NEEDED: MSL rating] β€”
Macrocells β€” 512
Maximum Frequency (fCNT) β€” 116.3 MHz
Supply Voltage (VCCINT) β€” 3.3 V
In-System Programmability β€” Yes (IEEE Std. 1532)
JTAG Boundary Scan β€” Yes (IEEE 1149.1)
PCI Compliance β€” PCI Local Bus Spec Rev. 2.2 (-10 speed grade)

Datasheets & Resources

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