EPM3512AQC20810N vs EPM3512AQI20810 Comparison

Detailed side-by-side comparison of EPM3512AQC20810N by Altera and EPM3512AQI20810 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AQC20810N EPM3512AQI20810
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $39.75 $21.10
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 512 β€”
Usable Gates 10,000 10,000
User I/Os 172 β€”
Logic Array Blocks (LABs) 16 16 (32 macrocells each)
Propagation Delay (tPD) 10 ns β€”
Core Voltage (VCCINT) 3.3 V β€”
I/O Voltage (VCCIO) 3.3 V (5.0 V tolerant I/O) β€”
Package 208-pin PQFP (Plastic Quad Flat Pack) 208-pin PQFP (PQ208)
Configuration Memory EEPROM (non-volatile, instant-on) β€”
Programming Interface JTAG (IEEE 1149.1 / IEEE 1532 ISP) β€”
Maximum Frequency [DATA_NEEDED: fMAX] β€”
Operating Temperature [DATA_NEEDED: industrial/commercial grade range] -40 Β°C to +85 Β°C (Industrial, "I" suffix)
RoHS Status [DATA_NEEDED: lead-free/RoHS status] β€”
Mounting Type Surface Mount Surface Mount
MSL Level [DATA_NEEDED: MSL rating] β€”
Macrocells β€” 512
Maximum User I/O Pins β€” 172
Pin-to-Pin Propagation Delay (tPD) β€” 10 ns
Internal fMAX (logic feedback) β€” 87 MHz
Supply Voltage (VCCINT) β€” 3.0 V to 3.6 V
MultiVolt I/O Interface β€” 1.8 V / 2.5 V / 3.3 V / 5.0 V compatible
Process Technology β€” 0.30 Β΅m CMOS EEPROM
In-System Programmability β€” IEEE Std. 1149.1 JTAG + IEEE Std. 1532
Lead-Free / RoHS β€” Contains lead / RoHS non-compliant (per Altera datasheet marking)

Datasheets & Resources

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