EPM3512AQI208-10N vs EPM3512AQC208-10N Comparison
Detailed side-by-side comparison of EPM3512AQI208-10N by Intel and EPM3512AQC208-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3512AQI208-10N | EPM3512AQC208-10N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.90 | $42.80 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Family | CMOS EEPROM-based | β |
| Macro Cells | 512 | β |
| Logic Array Blocks (LABs) | 12 | 16 |
| User I/Os | 172 (max), 208-pin package | 172 |
| Propagation Delay (tPD) | 10 ns | β |
| Supply Voltage | 3.3 V | 3.3 V |
| I/O Standards | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) | MultiVolt (1.8V / 2.5V / 3.3V) |
| Package Type | PQFP-208 (FINE LINE BGA-style 256-pin land) | β |
| Pins | 256 (package), 208 used | β |
| Operating Temperature | 0C to 70C | 0 C to 70 C (commercial) |
| Mounting Type | Surface Mount | β |
| Programming Interface | JTAG (IEEE 1149.1) / ISP (IEEE 1532) | β |
| Compliance | RoHS status unknown from data | β |
| Boundary Scan | Built-in BST (IEEE 1149.1) | β |
| Configuration Memory | On-chip EEPROM, non-volatile | β |
| Macrocells | β | 512 |
| Usable Gates | β | Up to 10,000 |
| Package | β | 208-pin PQFP (Plastic Quad Flat Pack) |
| Pin-to-Pin Delay | β | 4.5 ns (-10 speed grade) |
| Maximum Internal Frequency | β | 227.3 MHz |
| Speed Grade | β | -10 |
| Process Technology | β | CMOS EEPROM |
| In-System Programming | β | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 |
| Boundary-Scan Test (BST) | β | Built-in, IEEE 1149.1 compliant |
| RoHS Status | β | [DATA_NEEDED: RoHS status not in verified web data] |