EPM3512AQI208-10N vs EPM3512AQI20810 Comparison
Detailed side-by-side comparison of EPM3512AQI208-10N by Intel and EPM3512AQI20810 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3512AQI208-10N | EPM3512AQI20810 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.90 | $21.10 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Logic Family | CMOS EEPROM-based | β |
| Macro Cells | 512 | β |
| Logic Array Blocks (LABs) | 12 | 16 (32 macrocells each) |
| User I/Os | 172 (max), 208-pin package | β |
| Propagation Delay (tPD) | 10 ns | β |
| Supply Voltage | 3.3 V | β |
| I/O Standards | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) | β |
| Package Type | PQFP-208 (FINE LINE BGA-style 256-pin land) | β |
| Pins | 256 (package), 208 used | β |
| Operating Temperature | 0C to 70C | -40 Β°C to +85 Β°C (Industrial, "I" suffix) |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP (IEEE 1532) | β |
| Compliance | RoHS status unknown from data | β |
| Boundary Scan | Built-in BST (IEEE 1149.1) | β |
| Configuration Memory | On-chip EEPROM, non-volatile | β |
| Macrocells | β | 512 |
| Usable Gates | β | 10,000 |
| Maximum User I/O Pins | β | 172 |
| Pin-to-Pin Propagation Delay (tPD) | β | 10 ns |
| Internal fMAX (logic feedback) | β | 87 MHz |
| Supply Voltage (VCCINT) | β | 3.0 V to 3.6 V |
| MultiVolt I/O Interface | β | 1.8 V / 2.5 V / 3.3 V / 5.0 V compatible |
| Package | β | 208-pin PQFP (PQ208) |
| Process Technology | β | 0.30 Β΅m CMOS EEPROM |
| In-System Programmability | β | IEEE Std. 1149.1 JTAG + IEEE Std. 1532 |
| Lead-Free / RoHS | β | Contains lead / RoHS non-compliant (per Altera datasheet marking) |