EPM3512AQI208-7 vs EPM3512AQC208-7 Comparison

Detailed side-by-side comparison of EPM3512AQI208-7 by Altera and EPM3512AQC208-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AQI208-7 EPM3512AQC208-7
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.85 $41.72
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 10,000 10,000
Macro Cells 512 β€”
Logic Array Blocks (LABs) 16 β€”
Maximum Operating Frequency 116.3 MHz β€”
Speed Grade -7 β€”
Pin-to-Pin Delay (tPD) [DATA_NEEDED: tPD in ns] β€”
Core Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V β€”
Programmability Non-volatile, in-system programmable (IEEE Std. 1532) β€”
JTAG Support Yes (IEEE 1149.1 boundary scan + ISP) β€”
User I/O Pins [DATA_NEEDED: user I/O count for PQFP-208] β€”
Package 208-pin PQFP 208-Pin PQFP (FQFP, gull-wing)
Mounting Type Surface Mount β€”
Operating Temperature -40C to +85C (industrial) 0 C to +70 C (commercial)
Lead-Free / RoHS Compliant per Altera product page β€”
Macrocells β€” 512
Propagation Delay (tPD) β€” 7.5 ns
Counter Frequency (fCNT) β€” 116.3 MHz
User I/Os β€” 172
Logic Elements / LEs β€” N/A (CPLD macrocell architecture)
Supply Voltage (VCCINT) β€” 3.3 V
I/O Standards Supported β€” 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O)
Programming β€” In-System Programmable via JTAG (IEEE Std. 1532)
Process Technology β€” CMOS EEPROM, 0.30 um
RoHS Status β€” Compliant
Lead-Free β€” Yes

Datasheets & Resources

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