EPM3512AQI20810 vs EPM3512AQI208-10N Comparison
Detailed side-by-side comparison of EPM3512AQI20810 by Intel and EPM3512AQI208-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3512AQI20810 | EPM3512AQI208-10N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.10 | $12.90 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | β |
| Usable Gates | 10,000 | β |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | 12 |
| Maximum User I/O Pins | 172 | β |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | β |
| Internal fMAX (logic feedback) | 87 MHz | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | β |
| MultiVolt I/O Interface | 1.8 V / 2.5 V / 3.3 V / 5.0 V compatible | β |
| Package | 208-pin PQFP (PQ208) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | 0.30 Β΅m CMOS EEPROM | β |
| In-System Programmability | IEEE Std. 1149.1 JTAG + IEEE Std. 1532 | β |
| Operating Temperature | -40 Β°C to +85 Β°C (Industrial, "I" suffix) | 0C to 70C |
| Lead-Free / RoHS | Contains lead / RoHS non-compliant (per Altera datasheet marking) | β |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Family | β | CMOS EEPROM-based |
| Macro Cells | β | 512 |
| User I/Os | β | 172 (max), 208-pin package |
| Propagation Delay (tPD) | β | 10 ns |
| Supply Voltage | β | 3.3 V |
| I/O Standards | β | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) |
| Package Type | β | PQFP-208 (FINE LINE BGA-style 256-pin land) |
| Pins | β | 256 (package), 208 used |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP (IEEE 1532) |
| Compliance | β | RoHS status unknown from data |
| Boundary Scan | β | Built-in BST (IEEE 1149.1) |
| Configuration Memory | β | On-chip EEPROM, non-volatile |