EPM3512ATC144 vs EPM3256ATC144-7 Comparison

Detailed side-by-side comparison of EPM3512ATC144 by Altera and EPM3256ATC144-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3256ATC144-7

EPM3256ATC144-7 - MAX 3000A 256-Macro CPLD, 7.5ns TQFP-144 | Altera

EPM3256ATC144-7 Obsolete

Specification Comparison

Parameter EPM3512ATC144 EPM3256ATC144-7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.75 $17.06
Family MAX 3000A MAX 3000A
Macrocells 512 256
Logic Array Blocks (LABs) 16 β€”
Maximum User I/O Pins 212 β€”
Package TQFP-144 (20x20 mm) TQFP-144 (LFQFP, gull-wing)
Core Supply Voltage 3.3 V β€”
Programming Technology EEPROM (in-system programmable) β€”
JTAG Interface IEEE Std. 1149.1 (4-pin) β€”
Maximum Frequency 116 MHz β€”
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns] 7.5 ns
Product Terms per Macrocell 32 (expandable) β€”
I/O Standards LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (Commercial)
Mounting Type Surface Mount Surface Mount
MSL Level 3 β€”
RoHS Status Compliant (lead-free suffix variants available) β€”
User I/Os β€” 116
Logic Elements / Gates β€” 600 to 10,000 usable gates
Counter Frequency (fCNT) β€” 227.3 MHz
Speed Grade β€” -7
Supply Voltage - Core (VCCINT) β€” 3.3 V
Supply Voltage - I/O (VCCIO) β€” 2.5 V / 3.3 V / 5.0 V
In-System Programming β€” IEEE Std. 1532 compliant, 3.3 V ISP
Pin Count β€” 144
PCI Compliance β€” PCI Local Bus Specification Revision 2.2 (speed grades -4 to -10)
JTAG Support β€” IEEE Std. 1149.1 boundary-scan

Datasheets & Resources

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